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80186 Microprocessors: Introduction and Architecture

Hello friends, today we are going to discuss the 80186 microprocessor with integrated peripherals. The Intel 80186 is an improved version of the 8086 microprocessor. 80186 is a 16-bit microprocessor with a 16-bit data bus and a 20-bit address bus. It has a programmable peripheral device integrated into the same package. The instruction set of the 80186 is a superset of the instruction set of the 8086. The term super-set means that all of the 8086 instructions will execute properly on an 80186, but the 80186 has a few additional instructions. The following figure shows the block diagram and pin diagram of 80186. The CPU is divided into seven independent functional parts. 80186 internal block diagram  80186 68-pins pin diagram  Functional parts of 80186 Microprocessor The Bus Interface Unit (BIU) Execution Unit (EU) Clock Generator Programmable interrupt controller Programmable Chip Select Unit (CSU) Programmable DMA Unit Programmable counter/timers The Bus Interface Unit

Pin Diagram of 8085 Microprocessor

The 8085 microprocessor is an 8-bit general-purpose microprocessor. When we see the functional diagram of any device we need to see the structure of those parts or how to work that device in a smooth manner. 8085 is having similar technology. If you want functional block diagram to see my post- 8085 Microprocessor and   Architecture and for bus-structure see Bus Structure of 8085 Microprocessor.

Pin Diagram Description


The 8085 device has 40-pins and it requires to operate that device either a +5V single power supply or with 3-MHz single-phase clock. Fig shows the logical pin diagram of the 8085 microprocessor.


All the signals from the pins can be classifieds into six groups, these are as follows.
  • Power supply and clock signals
  • Address bus
  • Data bus
    Pin Diagram of 8085 Microprocessor
    Pin Diagram of 8085 Microprocessor
  • Control and status signals
  • Interrupts and externally initiated signals
  • Serial I/O ports

Power supply and Frequency Signals:

· Vcc: +5V power supply
· Vss: Ground reference
· X1, X2: A crystal having frequency 6MHz is connected at these two pins X1 and X1, the frequency is internally divided by two, therefore to operate a system at 3MHz.
· CLK (OUT): Clock Output is used as the system clock for peripherals and other devices interfaced with the microprocessor.

Address Bus (A8 – A15)

An address bus is a group of 8- signal lines A8 –A15 which are unidirectional and passes the high order data.

Multiplexed Address / Data Bus (AD0 – AD7)

The signal lines AD0 - AD7 are bidirectional i.e. these signals are dual purpose.
1. To passes the low order addresses during the earlier part of the cycle called low order address bus.
2. To passes the data during the later part of the cycle called data bus.
To switch the data from low order address bus to the data bus is called multiplexing and these multiplexing can be possible with the help of latch (ALE).

Control and Status signals

This group of signals includes two control signals ( and ), three status signals (IO/M, S1 and S0) and one special signal (ALE). These are as follows.
  • ALE (Address latch Enable): when the positive pulse generated as 1, the ALE indicates the begins of an operation i.e. machine cycle. It indicates that the bits AD7-Ad0 are just for addresses, not for data.
  • RD(Read): This is a low active read control signal. This signal indicates that the selected I/O or memory (IO/M) device is to be read and data is available on the data bus.
  • WR(Write): This is a low active write control signal. This signal indicates that the data on the data bus are to be written into a selected memory or IO location.
  • IO/ M  This status signal used to indicate the operation belongs to either the memory or peripherals. When it is high, it indicates IO operations. When it is low i.e. memory operations. As discussed above this signal is combined with RD(Read) and WR(write) operations to generate IO and Memory control signals.
    • Example: if IO/M=1 and RD=0 then Read the data from IO peripherals.
    • If IO/m =1 and WR=0 then write data to peripherals.
    • If IO/M=0 and RD=0 then read data from memory. And so on
  •  S1 and S0: These status signals are similar to IO/M to identify various operations but they are rarely used in small systems. Externally initiated signals including interrupts: 8085 has five interrupts signals that can be used to interrupt program execution, three pins READY, HOLD and RESET- accept for externally initiated signals as inputs.

Interrupts and externally initiated signals

1. INTR (Input) Interrupt request: This is used as a general-purpose interrupt.
2. INTA (output) interrupt Acknowledge: this is used to acknowledge an interrupt.
3. RST 7.5, RST 6.5, RST 5.5 (Inputs): Restart Interrupts: these are vectored interrupts and transfer the program control to specific memory locations. They have higher priorities than the INTR interrupt. Among these three, the priority order is 7.5, 6.5 and 5.5.
4. TRAP (Input): This is a nonmaskable interrupt and has the highest priorities.
5. HOLD (Input): This indicates that a peripheral such as a DMA(Direct Memory Access) controller is requesting the use of the address and data buses.
6. HLDA (output) Hold Acknowledge: This signal acknowledges the hold request.
7. READY (Input): This signal is used to delay the microprocessor read or write cycles until a slow responding peripheral is ready to send or accept data. when this signal goes low, the microprocessor waits for operations. And when this goes high, the microprocessor performs the operations either read or write.

Reset signal

8. RESET IN: when the signal on this pin goes low, the program counter is set to zero. The buses are tri-stated, and the MPU is reset. (Tri-stated means to represent three logic states Logic 0, logic 1 and high impedance state, when microprocessor uses tri-state interfacing devices, peripherals do not load the system buses.)
9. RESET OUT: This signal indicates that the MPU is being reset. This signal can be used to reset other devices.

Serial IO Ports

The 8085 has two signals to implement the serial transmission SID (Serial Input data) and SOD (Serial output data)
  • SID and SOD – SID is a data line for serial input whereas SOD is a data line for serial output.
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